This application claims priority from Korean Patent Application No. 2002-15149, filed on Mar. 20, 2002, the contents of which are incorporated herein by this reference in their entirety.
1. Field of the Invention
The present invention relates to a semiconductor device and a method for fabricating the same and, more particularly, to a reinforced bond-pad substructure and a method for fabricating the same.
2. Description of the Related Art
As integration level of semiconductor chips increases, the size of the semiconductor chips decreases and the number of metal interconnects increases. Such an increase in the number of metal interconnects results in a decrease in the pitch between metal interconnects and also in the thickness of the metal interconnect.
Particularly, such a reduction in the thickness of a final (topmost) metal interconnect increases the defect rate of a wire bonding process in a semiconductor packaging process. Thus, in general, increasing the thickness of the final metal interconnect to form the bond pad, or reinforcing the substructure of the bond pad decreases the defect rate of the wire bonding process. (A bond pad is a portion through which the final metal interconnect is exposed for connecting integrated circuit patterns in the semiconductor chip to an external device, typically using a gold wire, solder balls, and solder bumps.)
Increasing the thickness of the final metal interconnect, however, inhibits the higher integration of the semiconductor chips. Consequently, other methods for reinforcing the underlying structure (substructure) of the bond pad, e.g., an intermetal dielectric (IMD) layer, have been introduced to reduce the defect rate of the wire bonding process.
One such method to reinforce the structure of the IMD layer includes forming a contact in the IMD layer into a line type, namely, a mesh-like, not a integral plug type, thereby improving the mechanical strength of the bond pad and increasing the reliability in the wire bonding process. In the mesh-like contact opening, the line width is formed as fine as possible while the space between line type contacts is formed as large as possible.
FIG. 1 is a cross-sectional view illustrating a substructure of a bond pad in a conventional semiconductor device and a method for fabricating the same.
Referring to FIG. 1, a conventional semiconductor device is formed of a substructure 105 including a transistor area 102 on a semiconductor substrate 100, and an insulating layer 104 on the transistor area 102. The transistor area 102 may be a transistor or bit line. A lower metal layer 106 is formed on the insulating layer 104. Then, an IMD layer 108 is deposited on the lower metal layer 106.
A reinforcing structure under a bond pad 114 is formed in the IMD layer 108. In particular, the IMD layer 108 is patterned to form a mesh-like contact opening 110 in the IMD layer 108. A conductive material is deposited on the resultant structure to fill the mesh-like contact opening 110. A planarization process such as a chemical mechanical polishing (CMP) or etchback process is then performed on the resultant structure to form the contact plug 103 that fills the mesh-like contact opening 110. A final metal interconnect 112 is deposited and patterned on the resultant structure having the contact plug 103. Then, a passivation layer 116 is deposited on the final metal interconnect 112. The passivation layer 116 is patterned to expose the bond pad 114 on which a wire bonding process is performed.
FIGS. 2 and 3 are plan views illustrating processes for forming the IMD layer 108 shown in FIG. 1. In particular, FIG. 2 is a plan view of a mask before an exposure process, and FIG. 3 is a plan view of the resulting structure including the IMD layer 108 after development and etching processes.
Referring to FIG. 2, a mask is provided to form the mesh-like contact opening 110 formed in the IMD layer 108 as shown in FIG. 1. The mask includes a mesh-like contact opening pattern 110xe2x80x2 having a line width as small as possible while the space between each line of the mesh-like contact opening 110xe2x80x2 is as large as possible.
The exposure process is, however, performed not only on the region of the IMD layer 108, on which the bond pad is to be formed, but also on the entire semiconductor substrate including the region underlying the bond pad to be formed. Although the line width of the mesh-like contact opening 110xe2x80x2 is narrow to maintain the shape of the mesh-like pattern in the subsequent processes, contact holes formed in a region except for the region underlying the bond pad (a main cell region in a semiconductor memory device) are relatively large. As a result, the region on which the bond pad will be formed has the trench having line widths relatively smaller than the contact holes in the main cell region.
With reference to FIG. 3, the mesh-like contact opening 110 is formed much larger (expands) during the development and etching process than the mesh-like contact opening 110xe2x80x2 of the mask because the trenches and contact holes having different sizes are formed in various regions, i.e., the region underlying the bond pad and the other semiconductor substrate region. Accordingly, it is impossible to attain a desired shape and dimension of the mesh-like contact opening 110 with high accuracy. In addition, even if the shape of mesh is formed as designed, a bond-pad metal layer surface can be bent, after an etchback process is performed and the bond-pad metal layer is formed.
As a result, it is difficult to form the mesh-like contact opening 110 in the IMD layer 108 located under the bond pad for practical use.
The present invention provides a semiconductor device for reinforcing a substructure of a bond pad to attain a mesh-like contact opening having a desired shape and dimension with high accuracy.
The present invention also provides a method for fabricating a semiconductor device for reinforcing a substructure of a bond pad. According to an embodiment, a semiconductor device comprises a semiconductor substrate and a substructure formed on the semiconductor substrate. The semiconductor device further includes an interlevel dielectric layer formed on the substructure. The interlevel dielectric layer includes a contact opening formed therein. The contact opening comprises a plurality of separate dots connected to each other. A contact plug is formed in the contact opening.
Accordingly, the contact opening, for example, a mesh-like contact opening, is formed in the interlevel dielectric layer located under the bond pad to increase mechanical intensity and durability of the bond pad. Therefore, the yield in the wire bonding process and reliability of the semiconductor device are significantly improved.